AUTOMATIZATION AND DESIGN OF INTEGRATED CIRCUIT HIGH LEVEL FLOORPLANNING SYSTEM

AUTOMATIZATION AND DESIGN OF INTEGRATED CIRCUIT HIGH LEVEL FLOORPLANNING SYSTEM

 Narek Asatryan

Masters Student, National Polytechnic University of Armenia,

Armenia, Yerevan

ABSTRACT

The work purpose is to design software tool, which will make possible to plan the arrangement and interconnections in a short time, also perform high-accuracy surface estimation of complete IS or sector sub-nodes.

Keywords: physical design, placement, floorplanning

Introduction

In whole integrated circuit design process physical design follows the circuit design. In the following process, the connections of the design components getting geometric shape and being placed in the appropriate layers of materials provide the required functionality of the components and getting fixed graphic dimensions and geometric appearance. Physical design directly effects on circuit performance, for example when we Place interconnected objects far apart, we will get larger chip sizes and slower performance. So Physical design can affect on circuit space, reliability, and capacity.

Physical design is usually divided into several stages for simplicity.

Our designing software tool will include only 2 phases of physical design ` Partitioning and floorplaning.

• In the partitioning phase, the chip is divided into small blocks. This is done mainly to separate different functionality blocks from each other, as well as to make allocation easier and the following division can be done during the RTL design phase, when the design engineer divides the entire design into sub-blocks and then moves on to the design work of each module. The main purpose of Placement phase is to partition the connection in such a way that the number of existing connections between objects is minimized.
• The second phase of physical design is floorplanning. Floorplanning is the process of identifying the objects that should be placed at a certain distance from each other. Well executed floorplan leads to higher IC design performance and optimal space utilization. If the number of objects in the mockup is large, then the whole process will be slower. So minimal space optimization allows use to use fewer resources and objects in our design as the result the placement of objects in the mockup will be closer together also shorter interconnect distances, fewer used sub-bands, faster end-to-end signal transfer. Similarly, bad floorplanning can create all kinds of design problems, for example ` Noise, IR drop problems.

Design process

The software tool was created by the Python programming language and the PyQt5 GUI library. Python libraries such as Re, Json are also used in software creating process.  Re library used to complex substitutions of string type to int type, Json library stores the appearance of a user-created chip or other structure, with the ability to make changes to the structure in the future.

Figure 1:The initial window of the program

The final version of program is above. It will make possible to plan the arrangement and interconnections and it can surface estimation of complete IC design or arbitrary section. The parameters of the object that placed in the mockup of the software, such as connections to other objects, coordinates and dimensions are stored in a separate Json file, which can be uploaded or saved by the user. Json files are created using list type data, which is created when creating the object or can be changed when performing operations with the object. List that created by Json and containing block parameters is dynamic, so list size and object parameters can be modified when user performing operations on the object.

Figure 2:Json implementation of object

One of the main features of the program is the ability to find surfaces in the model. The program allow user to calculate 3 types of surfaces ` taken area, chosen area, estimate area.

The area occupied by the blocks itself is saved in the taken area section. after calculating the area of ​​all Objects by using lengths and widths, all values ​​will be added together.

Figure 3: Taken Area

The chosen area platform displays a user-created custom area measurement rectangular area that has arbitrary dimensions and is imported by using the mouse.

Figure 4: Chosen Area

The estimate Area platform stores the entire surface area used by the blocks. The Estimate Area calculates the coordinates of all blocks by checking and using the coordinates of those objects that have the values ​​of the maximum and minimum coordinate axes in software mockup. As a result, by subtracting the minimum from the values ​​​​of the maximum coordinate axes, we will get used area width and length. It should be noted that the values ​​of the coordinate axes are obtained using the list () type containing the parameters of the blocks. Changing the coordinates or position of the objects also changes the parameters of the block in the list () type parameter list.

Also, software can filter mockup blocks list by using filter. User can filter software mockup view by giving his own width, length, area to get a list of its desired blocks on the mockup.

Figure 5: Filter window

There is random non-existing chip floorplan view on created software. So, user can save/load floorplan view, filter mockup by his desired parameters also calculates taken, estimate, chosen areas.

Figure 6: Filter window

Conclusion

In this article was designed an automated integrated circuit (IC) high-level planning system. It makes possible to plan the arrangement and interconnections in a short time, also perform high-accuracy surface estimation of complete IS or sector sub-nodes.

References:

1. "Physical Design Essentials: An ASIC Design Implementation Perspective" by Khoshrow Golshan.
2. Rapid GUI Programming with Python and Qt: The Definitive Guide to PyQt Programming by Mark Summerfield
3. Modern PyQt by Joshua Willman
4. QT Documentation: doc.qt.io