ANALYSIS OF FEATURES, TYPES, CAUSES AND MECHANISMS OF CMOS INTEGRATED CIRCUITS FAILURES

ANALYSIS OF FEATURES, TYPES, CAUSES AND MECHANISMS OF CMOS INTEGRATED CIRCUITS FAILURES

Dmitrii Meleshenko

graduate student, Samara National Research University named after Academician S.P. Korolev,

 Russia, Samara

Mikhail Piganov

Dr. Tekhn. sciences, prof., Samara National Research University named after Academician S.P. Korolev,

Russia, Samara

The purpose of this work is to increase the reliability of the spacecraft RES due to the rejection of potentially unreliable components based on the results of IP of their quality and DNA. The object of the study is special-purpose digital integrated circuits made using CMOS technology and widely used in on-board spacecraft equipment. The set goal is achieved by carrying out analysis of the chip failure study scheme taking into account the signs of failures, their types, causes and mechanisms. The theoretical significance of the work consists in the development of the theory of reliability in the field of individual forecasting of quality and reliability indicators of CMOS IMS for on-board RES, as well as in the development of the use of statistical and physical methods for analyzing failures of ERI MV.

The sign of failure of integrated microcircuits (IMS) means the impossibility of performing the functions assigned to it by the microcircuit (qualitative level), or non-compliance of the measured parameters with the given values ​ ​ in the TS (quantitative level). In some cases, the signs of the IMS failure are quite easy to determine, for example, during visual inspection (cracks, chips on the housing, damage to the leads, etc.), in other cases, metrological equipment must be used when measuring electrical parameters. It is noted that monitoring of the electrical parameters of the IMS allows you to obtain the most complete information about the structure of the IMS, and, therefore, about their operability.

As a rule, when controlling the complementary structure of a metal-oxide-semiconductor (CMOS), both static and dynamic electrical parameters are measured. Table 1 shows the most frequently observed controlled parameters of the IMS [1-4].

Table 1.

IMS CMOS parameters under control

CMOS IMS of special purpose, which are subject to operability requirements in space conditions, has established signs of failure occurrence, characterized by increase or decrease:

- static current consumption;

- dynamic current of consumption;

- voltage levels of logical zero and unity.

This is primarily due to structural changes in the crystal lattice of semiconductor materials, as well as ionization processes occurring in the active and passive regions of the layers [4]. In addition, during the operation of CMOS IMS in space conditions, short-term changes in the logical state of memory cells, triggers and registers may occur due to the occurrence of ionization pulse currents. Such currents can cause radiation latching (thyristor latch) or secondary breakdown of dielectric layers.

According to [5], more than 60% of IMS CMOS failures are caused by oxide film defects. It has been found that the macrodefects of oxide layers are capable of accumulating charge. Moreover, the accumulation of charge is more intense under the action of ionizing radiation, which is most critical in the case of spacecraft. It is important to note that the macrodefects of oxide films are electroneutral, and monitoring their presence is quite laborious. A method of controlling such macrodefects is known, consisting in sequential application of irradiation and heat treatment [5-6]. After exposure to irradiation and heat, CMOS IMS that have passed the control restore their parameters. CMOS IMS, having such macrodefects in the structure of oxide films, do not restore their parameters, and IMS is recognized as non-radiation resistant [5].

It has been found that special purpose CMOS IMs are subject to radiation effects, with transistor structures being the most sensitive to such effects. In this case, the indication of the failure of CMOS of the IMS is a change in the consumption current. For example, when the thyristor latching effect occurs in CMOS base matrix crystals (BMCs), the consumption current increases in the static mode, and decreases in the dynamic mode. When this effect occurs in the heap memory chips, the consumption current also changes. For microprocessor SBIS, it is established that the failure is usually determined by an increased value of the static consumption current. For non-volatile memory IMS, under the influence of radiation damaging factors, mass failures in memory cells were noted, and when turned off and then turned on, the information in the cells was not restored, but subsequently the IMS turned out to be operable [4].

Under the influence of low-intensity ionizing radiation (AI), semiconductor devices are subject to a damage effect, expressed in the manifestation of failures after a while, if the dielectric layers contain macrodefects comparable to the thickness of these layers. The mechanism of the effect consists in the accumulation of "holes" both in these macrodefects and at the interface of the dielectric and semiconductor layers during the influence of AI, which reduces the value of the breakdown voltage of the dielectric.

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